Search for Universal Ternary Quantum Gate Sets with Exact Minimum Costs

The choice of the best set of universal ternary gates for quantum circuits is an open problem. We create exact minimum cost ternary reversible gates with quantum multiplexers using the method of iterative deepening depth-first search (IDDFS) [25]. Such search is better for small problems than evolutionary algorithms or other search methods. Several new gates that are provably exact minimum cost have been discovered. These gates are next used as library building blocks in the minimization of larger ternary quantum circuits like highly testable GFSOP cascades [15,16] (that generalize ESOP) as well as the wave cascades [24] generalized to ternary logic. They are useful to design oracles for multivalued algorithms such as Deutsch-Jozsa [26] and Grover. 1. Quantum Gates and Circuits built from cascaded ternary quantum Multiplexers The research on designing best gates for ternary quantum circuits is very new and no efficient synthesis methods exist. To discover good sets of universal gates, several approaches were used, such as evolutionary algorithms, but they did not lead to satisfactory results. Practically, the evolutionary algorithms, even working for a long time, do not give warranty that the solution is exact minimum. We used also other well-known methods for solving combinatorial problems: a) simulated annealing, b) bacteria foraging, c) probabilistic generation, d) A* search and similar search algorithms, e) scattered search, f) Tabu Search, g) Particle Swarm Optimization (PSO) [23], genetic algorithms [22], but so far with no particular successes over methods presented here, so that this paper focuses on exhaustive search. Let us also observe, that the search for the best gates is performed only once in order to create a gate that is next used repeatedly in libraries. We can allow thus our computer to spend much time, even days and weeks, to find the exact minimum solution. Exhaustive search [3,20] has been already used before in reversible logic design, but there are many ways how the exhaustive search can be organized, and they differ in time and memory usage. We investigated several types of exhaustive search strategies to particular quantum circuit structures. We found that for this kind of problems the A* algorithm known from AI operates very similarly to breadth first search. Our IDDFS search is similar but is easy to program and uses less memory, thus allowing to minimize larger circuits. Ternary quantum macros – conceptual gates can be implemented using quantum multiplexers [21] as primitives, which themselves are composed from Muthukrishnan-Stroud (M-S) gates [2]. The quantum multiplexer concept [21] (called also the mux), used also by several other authors, is a convenient intermediate notation to synthesize both binary and multiple-valued (mv) quantum circuits. Therefore, this synthesis will be performed in terms of quantum multiplexers and their argument single qudit functions. (Qudits are quantum bits with radices higher than 2. Qutrit is a qudit used in ternary logic.) There exist several different more or less regular structures that describe how these gates can be cascaded. We will find exact minimum solutions to some well-known operators and also to new gates in order to form libraries of universal gates for mv quantum circuit synthesis. The exhaustive search creates the gate as a cascade starting from input signals of the function and next adds sequentially quantum mux after quantum mux to create the logic outputs of the cascade. The first practical goal of the exhaustive search approach proposed here is to find the realizations of all 2-quditgates and determine their minimum costs and the best efficiencies. Efficiency can be defined in terms of how many ancilla qudits are used to realize a function. The optimally designed gates presented in this paper are next used as the building blocks of larger gates in systematic synthesis methods which are extensions and generalizations of the previous logic synthesis methods used in reversible and quantum circuits [1,3,4,6,12,13,14,15,16,17,19,24]. Alternately, one can use the exhaustive method to synthesize small circuits. Exhaustive search can be also used as a part of more sophisticated hybrid synthesizers [20]. The method searches exhaustively until the given circuit is found for which is next proven that within given constraints (like size and gate types) it is not possible to find a better realization of the given function F. In addition, in another variant, we used adaptations of exhaustive methods to find useful solutions with no assurance of circuit’s minimality, but with taking into account important practical constraints such as a userspecified limited number of ancilla bits. 2. Quantum Ternary Gates and Structures Figures 2.1, 2.4 and 2.8 show different cascade implementations with two by two ternary quantum multiplexers. The small boxes at the left of mux symbol taken from classical logic represent arbitrary single qutrit unitary operators, but in this paper these operators are in addition permutative. The quantum multiplexer operates as follows: depending on a value 0, 1, and 2 of the control qutrit, the respective input with number 0, 1 and 2, respectively (counted from top) is selected and sent to the output. Thus respective operator fi is executed on the controlled qutrit. Fig. 2.1a is a cascade of two multiplexers where A is the controlling qutrit and is passed through without any change. B is the controlled data qutrit on which the functions are applied. In the case of the Fig. 2.1a, controlled qutrit B would be manipulated always in pairs of f0 and f3, f1 and f4 or f2 and f5. Therefore this implementation is not very useful, because the manipulations could be restricted to one multiplexer; e.g. assuming f0 = +1 and f3 = +1 could be realized by only using f0 = +2. Operations +1 and +2 are implemented as cyclical shifts by 1 and by 2, respectively in one-qutrit operations. In Fig. 2.1b let us look at the first multiplexer. On the second multiplexer bit A is used as data input and bit B is the control input. Assume functions f0, f1, f2, f3, f4 and f5 to be defined as f0 = +1, f1 = 01, f2 = +2, f3 = 02, f4 = +2, f5 = 12. The circuit and the resulting ternary map are shown in Fig. 2.2. Operation 01 is a permutation of values 0 and 1 in single qutrit, operations 12 and 02 are implemented analogously. (These operations are realized internally by combinations of X, Y and Z rotation operators [27,7] in data inputs of M-S gates [2]). It should be noticed that the ratio of symbols “0”, “1” and “2” in both Karnaugh maps are 1:1:1. If we would continue the cascade using this structure we would only get result with always the same amounts of symbols zero, one and two. Therefore this structure is also not sufficient to scale up to an arbitrary quantum circuit. The SWAP gate was proven to be in the minimum set of universal gates [11] and can be easily build from other sets of universal gates. It is the hypothetical crossing of wires that allows one to realize many small gates that are difficult to realize without it. A realization was shown in [9] and is represented in Fig. 2.3. Each intermediate function is shown by a ternary map with A as rows and B as columns. This gate has high importance in ternary quantum circuit synthesis which has been not yet recognized by the published synthesis papers. This gate is necessary for mapping to ion trap technology quantum circuits and other technologies with linear layout of qudits (with every qudit having at most two neighbors). We can explain this property on an example as follows. Fig. 2.1: First two structures based on cascaded quantum multiplexers Assume that in a quantum array a wire in qudit 2 from top goes through Feynman gate in which qudit 1 controls qudit 3. This is not realizable in these technologies and requires two SWAP gates to be added between qudits 1 and 2, before and after the Feynman gate. Thus, instead of synthesizing without taking care of the no-crossing condition and next adding SWAP gates, another method can be invented where the no-crossing condition is build into the cost function and thus the number of crossing wires is reduced from the very design principle [23]. However, A